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Yuki Yamanashi

Investigation of Multi-Phase Timing Windows for Adiabatic Quantum-Flux-Parametron Logic
Synthesis flow for cell-based adiabatic quantum-flux-parametron structural circuit generation with HDL back-end verification
Recent Progress on the Development of EDA Tools for Adiabatic Quantum-Flux-Parametron VLSI Circuits
Synthesis Flow for Cell-Based Adiabatic Quantum-Flux-Parametron Logic Circuit Generation
15p-4B-2
Demonstration of bit-serial sfq-based computing for integer iteration algorithms
High-speed demonstration of bit-serial floating-point adders and multipliers using single-flux-quantum circuits

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