2 | C2Lab - Cryogenic Computing Laboratory

15p-4B-2 A feedback-friendly large-scale clocking scheme for adiabatic quantum-flux-parametron logic datapaths A Life-Cycle Energy and Inventory Analysis of Adiabatic Quantum-Flux-Parametron Circuits A semi-custom design methodology and environment for implementing superconductor adiabatic quantum-flux-parametron microprocessors A Study on Majority Synthesis for Adiabatic Superconducting Logic Adiabatic quantum-flux-parametron: Towards building extremely energy-efficient circuits and systems Analysis of Malfunction of an Adiabatic Quantum Flux Parametron 16-bit Kogge Stone Adder Buffer and Splitter Insertion for Adiabatic Quantum-Flux-Parametron Circuits C-8-12 HDL-based Modeling Approach for Digital Simulation of Adiabatic Quantum Parametron Logic C-8-22 Study on Power Dissipation of Collatz Conjecture Processors Based on SFQ circuits C-8-8 Improvement of Computational Efficiency Collatz Conjecture Processors ColdFlux superconducting EDA and TCAD tools project: Overview and progress Demonstration of a 47.8 GHz high-speed FFT processor using single-flux-quantum technology Demonstration of bit-serial sfq-based computing for integer iteration algorithms Design and Evaluation of a 1-bit Random Number Generator using Adiabatic Quantum-flux-parametron Logic Design and Evaluation of Random Number Generators Based on Non-Adiabatic Quantum-Flux-Parametron Gates Design and Implementation of Energy-Efficient Majority-Logic-Based Approximate Adders Using Adiabatic Quantum-Flux-Parametron Technology Design and Implementation of Power Consumption Reduction Binary Neural Networks Using Adiabatic Quantum-Flux-Parametron Logic Design of adiabatic quantum-flux-parametron register files using a top-down design flow Design of an Extremely Energy-Efficient Hardware Algorithm Using Adiabatic Superconductor Logic and Its Digital Modeling Approach Design of an SFQ convolutional computation processor for convolutional neural network Development of Topdown Environment for Adiabatic Quantum Flux Parametron Circuits Dual-mode neuron design with deterministic and non-deterministic operations using adiabatic superconductor devices Electrostatic Gate-Tunable Josephson Junctions in JoSIM: Modeling, Simulation, and I--V Characterization Extremely energy-efficient non-linear function approximation framework using stochastic superconductor devices Fabrication of adiabatic quantum-flux-parametron integrated circuits using an automatic placement tool based on genetic algorithms HDL-based Modeling Approach for Adiabatic Superconductor Logic Simulation High-speed demonstration of bit-serial floating-point adders and multipliers using single-flux-quantum circuits Improvement for autocorrelation of adiabatic quantum-flux-parametron based random number generator Investigation of Multi-Phase Timing Windows for Adiabatic Quantum-Flux-Parametron Logic Logic synthesis of sequential logic circuits for adiabatic quantum-flux-parametron logic Low-autocorrelation random number generator based on adiabatic quantum-flux-parametron logic Majority-Logic-Based Approximate Adders Using Adiabatic Quantum-Flux-Parametron Methodology for Automating Data Feedback Circuit Synthesis for a 4-bit Counter in Adiabatic Quantum-Flux-Parametron Logic Recent research developments of adiabatic quantum-flux-parametron circuitstechnology toward energy-efficient highperformance computing Results from the ColdFlux superconductor integrated circuit design tool project Scalable true random number generator using adiabatic superconductor logic Sigmoid function generator using stochastic adiabatic superconductor logic SuperSIM: a comprehensive benchmarking framework for neural networks using superconductor Josephson devices Synthesis flow for cell-based adiabatic quantum-flux-parametron structural circuit generation with HDL back-end verification Timing extraction for logic simulation of VLSI adiabatic quantum-flux-parametron circuits True stochastic number generator using adiabatic quantum-flux-parametron logic 超伝導エレクトロニクス超伝導エレクトロニクス